A computer system consists of a number of devices, termed "nodes," interconnected by one or more system buses. In a system of interest here, the nodes communicate with each other by sending address/control information and data over a bus in various address/control and data cycles. A transmitting node may send the data and control information to a particular node or it may broadcast the data and information to every node on the system.
The nodes on one system bus can communicate with the nodes on a second system bus through a bridge, which is a node that is essentially connected to each of the system busses. A bridge receives on one bus data which is intended for one or more nodes on the second system bus, and it then transmits the data on the second bus to the intended receiving node.
In order for a node which receives data over a bus to interpret the data correctly, the node must be in synchronism with the node which transmitted the data. In some systems, for example, a data transfer involves two or more cycles in which a node transmits in a first cycle "x" data bits in parallel over the bus and some time later transmits another x data bits in a second cycle. Since the nodes transmit the data in two separate data cycles, a receiving node must be operating in, for example, a first data cycle to interpret or utilize correctly the data bits transmitted in the first data cycle. Otherwise, if the receiving node and the transmitting node are out of synchronism, the receiving node may assign the data to an incorrect use by associating them with the wrong data cycle. When this happens, the node produces errors which may not be detected.
Before transmitting the data bits, the transmitting node may encode them for error protection using an error correction code and generate error correction symbols. The node then appends the error correction symbols to the data to form error correction code words and transmits each of the code words in parallel over the bus. The receiving node manipulates the code words to detect and, if possible, correct errors in the code word data. The error correction procedure ensures that the data is either error-free or labeled as erroneous. It does not, however, detect or correct the type of errors caused by a mis-synchronization of the transmitting and the receiving nodes, that is, errors caused by associating the data with the wrong data cycle.
One solution is to transmit the cycle number along with the data by appending to the data a plurality of "cycle bits." For a system with four data cycles, for example, two extra bits are appended to the data, and thus, two extra transmission lines are required. This solution is both expensive to implement, and it does not protect the cycle number from transmission errors. To protect the cycle bits from transmission errors, one or more parity bits must be included in the transmission, which further increases the number of required transmission lines.